PIPELINE CONTROL 2 Aug,2023 boomtecho2@gmail.comLeave a comment Please enter your email: 1. Pipelining is a ___ technique serial operation Parallel operation scalar operation superscalar operation 2. Each stage of instruction should execute in ———cycles? 1 2 3 4 3. The initial stage for an instruction executing in pipelining is —–? Decode Execute fetch Address generation 4. For a six-stage pipelining, the initial instruction requires——-cycle for execution? 1 cycle 3 cycle 6 cycle 7 cycle 5. Parallelism can be achieved by———–technique. Hardware compiler Software All of the above 6. To exploit Pipelining in computer architecture—–? A single processor is used. The double processor is used. Multiple processors are used. None of the above. 7. In a pipelined processor, the processing units for integers and floating point is——-? same unit separate unit no unit Within each other 8. In—pipelining processor should pass the instructions through all the phases, regardless of the requirement of the requirements of instruction? Static Dynamic Complex Dynamic Both B and C 9. In —–pipeline processor, instructions not only bypass the phases but also choose then out of order? Static Dynamic Complex Dynamic Both A and C 10. ARM processors are available in the form of ——– pipelining? 3 stage 5 stage Both A and B None 11. The stages of 3 stage pipelining are—-? Fetch, decode, execute Decode, Fetch, Execute Execute, Fetch, Decode Address generation, Fetch, Execute. 12. .———instructions can cause a pipelining Hazard? Branch Interrupt Read after Write All of the above 13. Throughput is calculated as—- The number of instructions/ Total time to complete the instructions Total time to complete the instructions/number of instructions Speed of the processor/ Number of instructions The number of instructions/speed of the processor 14. To hold the results of intermediate stages in pipelining ——–are used? Caches Buffers Memory RAM unit 15. 3 stage pipelining has —– cycle latency? 1 2 3 4 16. By using pipelining, the latency of the instructions—? Increases Decreases It is unity Remains the same. 17. By using pipelining, the throughput of the processor—-? Increase Decrease Become unity Remains the same 18. In pipelining. each stage is given——time for the operation? Equal Different Infinite None of the above 19. Step to be taken when a hazard occurs ——? Flush the pipeline Freeze the pipeline Break the pipeline Both A and B 20. In pipelining, instructions are executed—-? Serially Parallel Concurrently None of the above 21. When the data operands are not available then it is called—-? Deadlock Push pop Data hazard 22. In pipelining, which of the following operation is used to enhance the memory access speed? Register Cache Stack queue 23. For pipelined systems, which of the following is particularly developed? Registers Cache Stack Queue 24. The pipeline process is a…? Stack operation Queue Operation Assembly line Super scalar 25. Which of the following is used to interleave both the fetch & execution cycles? Memory Stack Clock Register 26. Types of pipelines are….? 2 3 4 5 27. What is the function of an arithmetic pipeline? Additional Operation Character operations Floating point Division 28. Which of the below is not a pipeline conflicts? Balancing of load Character operations Time changes Dependency on data 29. The algorithm like Tomasulo is developed in ….year? Balancing of load Character operation Time changes Dependency on data 30. The Tomasulo algorithm is a hardware algorithm developed in…year? 1959 1967 1962 1983 31. How many parts are used for addition & subtraction of floating point in arithmetic pipeline? 2 3 4 6 32. Which of the following pipeline type deals with both register, memory operands & destinations? RISC Processor INstruction CISC 33. Which of the following units are called floating point units? Vector load Vector Functional Vector store Control unit 34. When pipelining increases then throughput of the processor will be…? Increase Decrease Stable Slightly increased 35. Which of the following statement is not true for pipelining? It decreases the execution time for an instruction It enhances the execution time for an instruction It enhances the throughput of a CPU instruction It decreases the throughput of a CPU instruction 36. Hazards occurred in the pipelining are….types? 2 3 4 5 37. An alternate name of pipeline stalling is called as? BuBBle Hazard Deadlock Execution 38. Once the instructions within pipeline are discarded then it is called as? Encoder Decoder Flushing Deadloack 39. Control hazard is also called as? Call Hazard Branch hazard Data hazard Structural hazard 40. In pipelined processor, the WB stage in instruction execution is ….stage? First Third Fifth Seventh 41. Which of the following instruction is not used for changing state….? Nope nop no-op no 42. Which of the following is used to implement an instruction pipeline? FIFO LIFO Deadlock stack 43. The best algorithm used for pipelining is…? Harsh Small Marge short Quick sort 44. Pipelining invented in …year? 1965 1970 1978 1980 45. Once the structural hazard is resolved then the processor working turns into…..? Slower Faster stable Large 46. Pipelining decreases an…..time? Execution resuming Terminating Cycle 47. Once the cache is divided into separate instruction then it is called….buffer? Instruction Data Terminating Cache 48. Exceptions which take place in instructions are…? Blocked Pipelined Synchronous Asynchronous 49. When the instruction moves from one stage to other in pipeline is called…? Instruction issue Deadlock Compiling Nullifying 50. In pipelined execution, how the instructions are executed within program? Sequentially Parallely Alternatively Not serially 51. How many ways are used to execute the instructions in a programme…? 2 3 4 5 52. In non-pipelined execution, how the program instructions are executed? Sequentially Parallel Alternatively none 53. How the computer architecture is abstracted? Through memory Through instruction set Through instruction only Through organization 54. Pipelining….the time of CLK cycle ? Increases Decreases No changes Slightly increases 55. In which of the following pipeline, all the tasks includes equivalent processing time ? Instruction Uniform Delay Arithmetic Processor 56. For arithmetic logic functions, which of the following contains several functional pipelines? Instruction unit Execution unit Uniform Delay Instruction queue 57. In pipelines, which of the following Hazard can be caused through resource conflicts? Control Structural RAW Data 58. Which of the following hazards arise from the branches of pipelining? Control Data Structural RAW 59. Which of the following is not used within super scalar processing? Serial instruction Parallel decoding Parallel encoding Pipelines 60. Pipeline processors are classified by …..? Handler & Ramamoorthy john von Gerrit Blauuw Stanley Williums 61. Pipeline processors are classified into …types based on their function? 2 4 6 8 62. Which of the following pipeline processor is used to perform high speed floating point addition, division & multiplication? Arithmetic Processor Unifunction Static 63. Which of the following pipelining is called instruction lookahead? Arithmetic Instruction Static Processor 64. When the processors are pipelined for processing the similar data stream? Instruction Processor Static Arithmetic 65. Which of the following pipelining is used to process the instructions through scalar operands? scalar Instruction static Arithmetic 66. The…….pipeline is used to perform a fixed-function every time? Instruction Scalar Static Arithmetic 67. Which type of pipeline is used to execute the similar type of instructions constantly? Static Arithmetic Instruction Scalar 68. The pipeline used to perform the exact function each time? Unifunction Scalar Static Instruction 69. Pipelining hazards are classified into …types? 2 3 5 4 70. Pipelining separates the instruction in ….. Stages? 2 3 4 5 71. Pipelining strategy is used to implement…? Instruction Execution Instruction manipulation Instruction prefetch Instruction decoding 72. Data hazards takes place when ….? Performance loss is huge Read/Write order changes to operands Functional unit is not completely pipelined Limited machine size 73. In pipeline hazards, pipeline stall is called…? Pipeline Bubble Pipeline Unit Pipeline execution Instruction manipulation 74. When two or more instructions are already within the pipeline require the similar resource, then this hazard is called…..? Resource Hazard Pipeline Hazard Control Hazard Data Hazard 75. Once two instructions within a program are executed in series then that is called…? Data Hazard Resource Hazard Control Hazard Pipeline Hazard 76. Data hazards are classified into…type? 2 3 4 5 77. The structural hazard is also called as…? Control Hazard Pipeline Hazard Resourse Hazard Data Hazard 78. Control hazard is also called….? Control Hazard Branch Hazard Resourse Hazard Pipeline Hazard 79. Which pipeline reads the instructions using the memory? Arithmetic Instruction Processor Vector 80. Which processor works on simple instruction….? Super scale Scale Pipelined Vector 81. Which processor pipelines the data by not only using Instruction pipeline…? Scalar Vector Super scalar Pipelined 82. Superscalar processors are invented in ….year? 1987 1980 1986 1985 83. Which processor is used to enhance the performance of scalar processor? Pipelined Scalar Vector Super scalar 84. Dynamic pipelines are…..? Non-linear pipeline vector Intruction Linear Pipeline 85. Generally, pipelined CPUs work at a high CLK frequency than…? RAM CLK frequency ROM Instruction Speed 86. In a pipelined architecture with 4- stages, each instruction execution can be finished in …stages? 4 6 8 16 87. The pipeline included in the RISC processor has ….stages? 4 5 6 7 Loading …
